GitHub

AAAI-23 Lab for Innovative Uses of Synthetic Data

Welcome to the AAAI-23 Lab for Innovative Uses of Synthetic Data! In this repository you will find materials required to complete the Lab. The Lab will start on Wednesday, 8 February 2023, 14:00 EST.
IEEE

A 0.5–1 V, −68 dB Power Supply Rejection Capacitorless Analog LDO Using Voltage-to-Time Conversion in 28-nm CMOS

Abstract: This article proposes an analog low-dropout (LDO) regulator using the voltage-to-time conversion technique to achieve high power-supply-rejection (PSR) at low supply voltages of less than 1 ...
IEEE

A 0.5–1-V Time-Voltage Hybrid Domain Dual- Loop Analog LDO With Wide-Bandwidth High PSR in 28 nm

Abstract: This article presents a time and voltage hybrid domain (HD) nested dual-loop analog low-dropout (LDO) regulator that achieves both wide-frequency-range high power supply rejection (PSR) and ...